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參數資料
| 型號： | Z550 |
| 元件分類： | 通信、網絡模塊及開發工具 |
| 英文描述： | Telecomm/Datacomm |
| 中文描述： | 電信/數據通信 |
| 文件頁數： | 1/30頁 |
| 文件大?。?/td> | 581K |
| 代理商： | Z550 |
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1
Oki Semiconductor
Z550 UART
0.5
μ
m Technology Mega Macrocell for Universal Asynchronous Receiver/Transmitter
DESCRIPTION
The Z550 UART Mega Macrocell is a featured library element in all of OKI’s 0.5
Customer Structured Array families. The OKI implementation of the mega macrocell is fully compatible
with industry standard 16550 functions.
μ
m Sea of Gates and 0.5
μ
m
The Z550 UART Mega Macrocell is an Asynchronous Communication Element (ACE), functionally equiv-
alent to the industry standard 16550 with 16 byte FIFOs available on both the transmitter and receiver. It
serves as a serial I/O interface in microcomputer systems performing serial to parallel conversions on data
characters received from peripheral devices or modems and parallel to serial conversions on data charac-
ters transmitted by the CPU. In FIFO mode, the FIFOs are enabled allowing 16 bytes of data to be stored
during both transmit and receive operations. The receive FIFO also provides three bits per byte of error
data. The status of the ACE can be read at any time by the CPU. Available information includes the type
and condition of transfer operations being performed and error conditions involving parity, overrun,
framing or break interrupt. The ACE includes a built in baud rate generator with 18 programmable baud
rates.
FEATURES
This Mega Macrocell Data Sheet contains all necessary information to enable the user to design a circuit
using the Z550 functions for OKI’s 0.5
μ
m Sea of Gates and 0.5
Supported ASIC Families
μ
m Customer Structured Array families.
Family Name
Family Type
MSM13R0000
Sea of Gates
MSM98R000
Customer Structured Array
Full double buffering
Full status reporting
16 byte receive and transmit FIFOs reduce CPU
interrupts
Independent control of transmit, receive, line
status data set interrupts and FIFOs
Modem control signals include: CTS, DCD,
DSR, DTR, RI, RTS
Programmable serial interface characteristics:
- 5, 6, 7, or 8 bit characters
- odd, even, or no parity generation and detection
- 1, 1.5, or 2 stop bits
Programmable Baud Rate Generator
(dc to 56k baud)
Unique OKI methodology for input timing
analysis
Tailored design flow and test procedure
alleviates user from test vector generation to
verify Z550 functionality
Specially developed software merges OKI test
vectors with the user’s circuit
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