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參數資料
| 型號： | Z550 |
| 元件分類： | 通信、網絡模塊及開發工具 |
| 英文描述： | Telecomm/Datacomm |
| 中文描述： | 電信/數據通信 |
| 文件頁數： | 12/30頁 |
| 文件大小： | 581K |
| 代理商： | Z550 |
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Z550 UART
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12
Oki Semiconductor
MSR(0)-MSR(3) is set to a one. The MSR is a priority 4 interrupt. The contents of the Modem Status Reg-
ister are described in
Figure 7
and the following table.
Figure 7. Modem Status Register
Reading the MSR Register will clear the delta modem status indications but has no effect on the other sta-
tus bits.
For LSR and MSR, the setting of status bits is inhibited during status register read operations. If a status
condition is generated during a read operation, the status bit is not set until the trailing edge of the read.
If a status bit is set during a read operation, and the same status condition occurs, that status bit will be
cleared at the trailing edge of the read instead of being set again.
Scratchpad Register
The Scratchpad Register is an 8-bit, Read/ Write register that has no effect on either channel in the ACE.
It is intended to be used by the programmer for temporarily data storage.
Modem Status Register Description
MSR Bit
Description
MSR(0)
Delta Clear to Send (DCTS): DCTS indicates that the CTS input to the serial channel has changed state since the
last time it was read by the CPU
MSR(1)
Delta Data Set Ready (DDSR): DDSR indicates that the DSR input to the serial channel has changed state since
the last time it was read by the CPU.
MSR(2)
Trailing Edge of Ring Indicator (TERI): TERI indicates that the RI input to the serial channel has changed state
from high to low since the last time it was read by the CPU. Low to high transitions on RI do not activate TERI.
MSR(3)
Delta Data Carrier Detect (DDCD): DDCD indicates that the DCD input to the serial channel has changed state
since the last time it was read by the CPU.
MSR(4)
Clear to Send (CTS): CTS is the complement of the CTS input from the modem indicating to the serial channel
that the modem is ready to receive data from the serial channel's transmitter output (SOUT). If the serial channel
is in loop mode [MSR(4) = 1], MSR(4) is equivalent to the RTS value in the MCR.
MSR(5)
Data Set Ready (DSR): Data Set Ready (DSR) is the compliment of the DSR input from the modem to the serial
channel which indicates that the modem is ready to provide data to the serial channel receiver circuitry. If the
channel is in the loop mode [MCR(4) = 1], MSR(5) is equivalent to the DTR value in the MCR.
MSR(6)
Ring indicator (RI): is the compliment of the RI input. If the channel is in the loop mode [MCR(4) = 1], MSR(6) is
equivalent to the OUT1 value in the MCR.
MSR(7)
MSR(7) Data Carrier Detect (DCD): Data Carrier Detect indicates the compliment of the Data Carrier Detect (DCD)
input. If the channel is in the loop mode [MCR(4) = 1], MSR(7) is equivalent to OUT2 value in the MCR.
MSR
7
MSR
6
MSR
5
MSR
4
MSR
3
MSR
2
MSR
1
MSR
0
(DDSR) Delta Data Set Ready
(TERI) Trailing Edge of Ring Indicator
(DDCD) Delta Data Carrier Detect
(CTS) Clear to Send
(DSR) Data Set Ready
(RI) Ring Indicator
(RLSD) Receiver Line Signal Detect
(DCTS) Delta Clear to Send
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