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參數資料
型號: L84302
元件分類: 通用總線功能
英文描述: L84302 Quad 100/10 Mbps 4-Port Ethernet Controller with RMON/SNMP Management Counters technical manual 4/02
中文描述: L84302四100/10 Mbps的4端口以太網的遠程監控控制器/ SNMP管理處的技術手冊,4月2日
文件頁數: 80/128頁
文件大小: 997K
代理商: L84302
80 of 128
April, 2002
L84302 Quad 4-Port Ethernet Controller - Technical Manual
Copyright 1997-2002 by LSI Logic Corporation. All rights reserved.
Bit 0 occurs on CDST0/CDST8 pin
Table 25
Configuration 4 Register Definition
7
6
5
4
3
2
1
0
CTRPKTSIZE
R/W
CTRRST
R/W
DATARST
R/W
MCENDPS
R/W
MCPASS1
R/W
MCPASS0
R/W
MCFLTR
R/W
MC_EN
R/W
Bit
Symbol
Name
Definition
R/W
Def.
7
CTRPKTSIZE
Counter Maximum
Packet Size Select
1 = maximum packet size for counters is
determined by bits 0-3 in Configuration 5
Reg.
0 = Maximum packet size for counters is
1518 bytes
R/W
0
6
CTRRST
Counter Reset
1 = All counters reset to 0
0 = No reset
R/W
1
5
DATARST
Data Path Reset
1 = Reset TX/RX data paths and TX/RX
FIFOs
0 = Normal
R/W
1
4
MCENDPS
MAC Control
Frame End Pause
Enable
1 = When FNCTRL deasserted, send
transmit MAC control frame with
pause_time=0
0 = Normal
R/W
1
3
2
MCPASS0
MCPASS1
MAC Control
Frame
Passthrough
Enable
11 = Reserved
10 = Valid MAC control frames that have
0 nonPause Opcode are passed thru to
RX FIFO
01 = Valid MAC control frames that have
any Opcode are passed thru to RX FIFO
00 = MAC control frames are not passed
thru to RX FIFO
R/W
0
1
MCFLTR
MAC Control
Frame Address Fil-
ter Enable
1 = Use any address as the DA to deter-
mine MAC control pause frame validity
0 = Use reserved multicast address or
station address as the DA to determine
MAC control pause frame validity
R/W
0
0
MC_EN
MAC Control
Frame Enable
1 = Valid receive MAC control frames
cause transmitter to pause (Enabled)
0 = Transmitter not paused (Disabled)
R/W
1
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