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參數資料
型號: MC68HC916X1
廠商: Motorola, Inc.
英文描述: 16-Bit Modular Microcontroller(16位模塊化微控制器)
中文描述: 16位微控制器模塊(16位模塊化微控制器)
文件頁數: 114/172頁
文件大小: 1035K
代理商: MC68HC916X1
MOTOROLA
114
MC68HC916X1
MC68HC916X1TS/D
In master mode, the QSPI executes a queue of commands defined by control bits in each command
RAM queue entry. Chip-select pins are activated, data is transmitted from transmit RAM and re-
ceived into receive RAM.
In slave mode, operation proceeds in response to SS pin activation by an external bus master. Op-
eration is similar to master mode, but no peripheral chip selects are generated, and the number of
bits transferred is controlled in a different manner. When the QSPI is selected, it automatically ex-
ecutes the next queue transfer to exchange data with the external device correctly.
Although the QSPI inherently supports multi-master operation, no special arbitration mechanism is
provided. A mode fault flag (MODF) indicates a request for SPI master arbitration. System software
must provide arbitration. Note that unlike previous SPI systems, MSTR is not cleared by a mode
fault being set, nor are the QSPI pin output drivers disabled. The QSPI and associated output driv-
ers must be disabled by clearing SPE in SPCR1.
7.5 SCI Submodule
The SCI submodule is used to communicate with external devices through an asynchronous serial
bus. The SCI is fully compatible with the SCI systems found on other Motorola MCUs, such as the
M68HC11 and M68HC05 Families.
7.5.1 SCI Pins
There are two unidirectional pins associated with the SCI. The SCI controls the transmit data (TXD)
pin when enabled, whereas the receive data (RXD) pin remains a dedicated input pin to the SCI.
TXD is available as a general-purpose I/O pin when the SCI transmitter is disabled. When used for
I/O, TXD can be configured either as input or output, as determined by QSM register DDRQS.
Table 60
shows SCI pins and their functions.
7.5.2 SCI Registers
The SCI programming model includes QSM global and pin control registers, and four SCI registers.
There are two SCI control registers, one status register, and one data register. All registers can be
read or written at any time by the CPU.
Changing the value of SCI control bits during a transfer operation may disrupt operation. Before
changing register values, allow the transmitter to complete the current transfer, then disable the re-
ceiver and transmitter. Status flags in the SCSR may be cleared at any time.
Table 60 SCI Pins
Pin Names
Receive Data
Mnemonics
RXD
Mode
Function
Not Used
Receiver Disabled
Receiver Enabled
Transmitter Disabled
Transmitter Enabled
Serial Data Input to SCI
General-Purpose I/O
Serial Data Output from SCI
Transmit Data
TXD
相關PDF資料
PDF描述
MC68HC9D60 Advance Information - Rev 4.0
MC68HC12D60 Advance Information - Rev 4.0
MC68HCL05C8A 8-Bit Microcontroller Units (MCU).(8位微控制器)
MC68HSC05C8A 8-Bit Microcontroller Units (MCU).(8位微控制器)
MC68HCP11 8-Bit Microcontrollers
相關代理商/技術參數
參數描述
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