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參數資料
型號: MC68HC916X1
廠商: Motorola, Inc.
英文描述: 16-Bit Modular Microcontroller(16位模塊化微控制器)
中文描述: 16位微控制器模塊(16位模塊化微控制器)
文件頁數: 46/172頁
文件大小: 1035K
代理商: MC68HC916X1
MOTOROLA
46
MC68HC916X1
MC68HC916X1TS/D
3.10.1 Ports A and B
Ports A and B are available in single-chip mode only. One data direction register controls data di-
rection for both ports. Port A and B registers can be read or written at any time the MCU is not in
emulator mode.
DDA and DDB control the direction of the pin drivers for ports A and B, respectively, when the pins
are configured for I/O. Setting DDA or DDB to one configures all pins in the corresponding port as
outputs. Clearing DDA or DDB to zero configures all pins in the corresponding port as inputs.
3.10.2 Port E
Port E can be made available in all operating modes. The state of BERR and DATA8 during reset
controls whether the port E pins are used as bus control signals or discrete I/O lines.
If the MCU is in emulator mode, an access of the port E data, data direction, or pin assignment reg-
isters (PORTE, DDRE, PEPAR) is forced to go external. This allows port replacement logic to be
supplied externally, giving an emulator access to the bus control signals.
PORTE is a single register that can be accessed in two locations. It can be read or written at any
time the MCU is not in emulator mode.
1. Reserved
1. Reserved
PORTA
— Port A Data Register
PORTB
— Port B Data Register
$YFFA0A
$YFFA0B
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
RESET:
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
DDRAB
— Port A/B Data Direction Register
$YFFA14
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
DDA
DDB
DDRE
RESET:
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
PORTE0, PORTE1
— Port E Data Register
$YFFA11, YFFA13
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NOT USED
PE7
PE6
PE5
PE4
RESERVED
PE1
RSVD
1
RESET:
U
U
U
U
U
U
U
U
DDRE
— Port E Data Direction Register
$YFFA15
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DDE7
DDE6
DDE5
DDE4
RESERVED
DDE1
RSVD
1
RESET:
0
0
0
0
0
0
0
0
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