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參數資料
型號: MC68HC916X1
廠商: Motorola, Inc.
英文描述: 16-Bit Modular Microcontroller(16位模塊化微控制器)
中文描述: 16位微控制器模塊(16位模塊化微控制器)
文件頁數: 98/172頁
文件大小: 1035K
代理商: MC68HC916X1
MOTOROLA
98
MC68HC916X1
MC68HC916X1TS/D
These registers show condition flags that correspond to various GPT events. If the corresponding
interrupt enable bit in TMSK1/TMSK2 is set, an interrupt occurs.
I4/O5F — Input Capture 4/Output Compare 5 Flag
When I4/O5 in PACTL is zero, this flag is set each time TCNT matches the value in TOC5. When I4/O5
in PACTL is one, the flag is set each time a selected edge is detected at the I4/O5 pin.
OCF[4:1] — Output Compare Flags
An output compare flag is set each time TCNT matches the corresponding TOC register. OCF[4:1] cor-
respond to OC[4:1].
ICF[3:1] — Input Capture Flags
A flag is set each time a selected edge is detected at the corresponding input capture pin. ICF[3:1] cor-
respond to IC[3:1].
TOF — Timer Overflow Flag
This flag is set each time TCNT advances from a value of $FFFF to $0000.
PAOVF — Pulse Accumulator Overflow Flag
This flag is set each time the pulse accumulator counter advances from a value of $FF to $00.
PAIF — Pulse Accumulator Flag
In event counting mode, this flag is set when an active edge is detected on the PAI pin. In gated time
accumulation mode, PAIF is set at the end of the timed period.
Setting a bit in CFORC causes a specific output on OC. PWMC controls operation of the GPT PWM
submodule.
FOC[5:1] — Force Output Compare
0 = Causes no action on corresponding OC pin.
1 = Causes pin action programmed for corresponding OC pin, but the OC flag is not set.
FOC[5:1] correspond to OC[5:1].
FPWMA/B — Force PWM Value
0 = PWM pin A/B is used for PWM functions; normal operation.
1 = PWM pin A/B is used for discrete output. The value of the F1A/B bit will be driven out on the
PWMA/B pin. This is true for PWMA regardless of the state of the PPROUT bit.
PPROUT — PWM Clock Output Enable
0 = Normal PWM operation on PWMA
1 = Clock selected by PPR[2:0] is driven out PWMA pin.
TFLG1/TFLG2
— Timer Interrupt Flag Registers 1–2
$YFF922
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
I4/O5F
OCF[4:1]
ICF[3:1]
TOF
0
PAOVF
PAIF
0
0
0
0
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CFORC/PWMC
— Compare Force Register/PWM Control Register
$YFF924
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
FOC[5:1]
0
FPWMA FPWMB PPROUT
PPR[2:0]
SFA
SFB
F1A
F1B
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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