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參數資料
型號: MC68HC916X1
廠商: Motorola, Inc.
英文描述: 16-Bit Modular Microcontroller(16位模塊化微控制器)
中文描述: 16位微控制器模塊(16位模塊化微控制器)
文件頁數: 130/172頁
文件大小: 1035K
代理商: MC68HC916X1
MOTOROLA
130
MC68HC916X1
MC68HC916X1TS/D
10. If the location is programmed, repeat the same number of pulses as required to program
the location. This provides 100% program margin.
11. Read the address to verify that it remains programmed.
12. Clear the LAT bit in FEExCTL. This disables the programming address and data latches.
13. If more locations are to be programmed, repeat steps 2 through 10.
14. Reduce voltage applied to the V
FPE
pin to normal read level.
9.6.4.2 Erasure
The following steps are used to erase a flash EEPROM array.
Figure 23
is a flowchart of the era-
sure operation. Refer to
Figures
45
and
46
in
11 Electrical Characteristics
for V
FPE
to V
DD
rela-
tionships during erasure.
1.
2.
3.
Increase voltage applied to the V
FPE
pin to program/erase/verify level.
Set the ERAS bit and the LAT bit in FEExCTL. This configures the module for erasure.
Perform a write to any valid address in the control block or array. The data written does not
matter.
Set the ENPE bit in FEExCTL. This applies the erase voltage to the array.
Delay the proper amount of time for one erase pulse. Delay is specified by parameter t
epk
.
Clear the ENPE bit in FEExCTL. This turns off erase voltage to the array.
Delay while high voltage to array is turned off. Delay is specified by parameter t
er
.
Read the entire array and control block to ensure all locations are erased.
If all locations are not erased, calculate a new value for t
epk
(t
ei
×
pulse number) and repeat
steps 3 through 10 until all locations erase, or the maximum number of pulses has been
applied.
10. If all locations are erased, calculate the erase margin (e
m
) and repeat steps 3 through 10
for the single margin pulse.
11. Clear the LAT and ERAS bits in FEExCTL. This allows normal access to the flash.
12. Reduce voltage applied to the V
FPE
pin to normal read level.
4.
5.
6.
7.
8.
9.
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