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參數資料
| 型號： | UJA1061 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low speed CAN/LIN system basis chip |
| 中文描述： | 低高速CAN / LIN系統基礎芯片 |
| 文件頁數： | 4/81頁 |
| 文件大小： | 323K |
| 代理商： | UJA1061 |
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2004 Mar 22
4
Philips Semiconductors
Objective specification
Low speed CAN/LIN system basis chip
UJA1061
1.4
CAN physical layer
ISO11898-3 compliant fault-tolerant CAN transceiver
Downwards compatible with TJA1054/TJA1054A
Enhanced error signalling and reporting
Separated low-drop-out voltage regulator for CAN bus:
– Microcontroller supply independent, autonomous
physical layer bus failure management
– Significantly improves EMC performance
Partial networking capability:
– Completely passive behaviour to the bus when
unpowered
– Selective Sleep option with global wake-up allowing
selected CAN bus communication without waking-up
sleeping nodes.
1.5
LIN physical layer
LIN2.0 compatible LIN transceiver
Enhanced error signalling and reporting.
2
GENERAL DESCRIPTION
The UJA1061 is a System Basis Chip (SBC), replacing
basic discrete components that are commonly used in
Electronic Control Units (ECUs) for automotive body
multiplexing. The UJA1061 supports any body application
which controls various power peripherals by using the
fault-tolerant CAN as the main physical layer and the LIN
physical layer as local sub-bus. The UJA1061 contains the
following integrated devices:
Low speed, fault-tolerant CAN transceiver,
inter-operable and downwards compatible with CAN
transceivers TJA1054 and TJA1054A, and compatible
with ISO11898-3 standard
LIN transceiver compatible with LIN specification,
revision 2.0
Watchdog
Separate voltage regulators for both host controller and
CAN transceiver
Serial peripheral interface (full duplex)
Local wake-up input port
Inhibit output port.
In addition to the cost advantages compared with
conventional multi-chip solutions, the UJA1061 offers an
intelligent combination of system-specific functions such
as:
Advanced low power concept
Safe and controlled system start-up behaviour
Advanced fail-safe system behaviour that prevents any
deadlock
Detailed status reporting on system and sub-system (for
example, CAN) levels.
The UJA1061 is intended to be used in combination with a
microcontroller and a CAN controller. The microcontroller
is the first to come and the last to go in an ECU designed
with the UJA1061. In failure situations, the UJA1061
maintains the microcontroller function as long as possible
in order to provide full monitoring and software driven
fall-back operation.
The UJA1061 can be operated in:
Single 42 V power supply architecture when combined
with an external step-down converter
Single 14 V power supply architecture
Dual 14 V and 42 V power supply architecture.
3
ORDERING INFORMATION
Note
1.
Add suffix to indicate version:
* = 5V0 for 5 V version
* = 3V3 for 3.3 V version
* = 3V0 for 3 V version
* = 2V5 for 2.5 V version.
TYPE
NUMBER
(1)
PACKAGE
NAME
DESCRIPTION
VERSION
UJA1061TW/*
HTSSOP32
plastic thermal enhanced thin shrink small outline package;
32 leads; body width 6.1 mm; lead pitch 0.65 mm; exposed die pad
SOT549-1
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相關代理商/技術參數 |
參數描述 |
|---|---|
| UJA1061_10 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Fault-tolerant CAN/LIN fail-safe system basis chip |
| UJA1061TW | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Fault-tolerant CAN/LIN fail-safe system basis chip |
| UJA1061TW/3V0,512 | 制造商:NXP Semiconductors 功能描述: |
| UJA1061TW/3V0512 | 制造商:NXP Semiconductors 功能描述:CONTROLLER SYS CAN/LIN 3V 32HTSSOP |
| UJA1061TW/3V3/C/T, | 功能描述:CAN 接口集成電路 FT CAN/LIN fail-safe system basis chip RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube |
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