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參數(shù)資料
型號: AD9910BSVZ-REEL
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer
中文描述: SERIAL, PARALLEL, WORD INPUT LOADING, 14-BIT DAC, PDSO100
封裝: ROHS COMPLIANT, MS-026AED-HD, TQFP-100
文件頁數(shù): 1/60頁
文件大?。?/td> 764K
代理商: AD9910BSVZ-REEL
1 GSPS, 14-Bit, 3.3 V CMOS
Direct Digital Synthesizer
AD9910
FEATURES
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2007 Analog Devices, Inc. All rights reserved.
www.analog.com
1 GSPS internal clock speed (up to 400 MHz analog output)
Integrated 1 GSPS, 14-bit DAC
32-bit tuning word
Phase noise ≤ 125 dBc/Hz @ 1 kHz offset (400 MHz carrier)
Excellent dynamic performance with
>80 dB narrow-band SFDR
Serial input/output (I/O) control
Automatic linear or arbitrary frequency, phase, and
amplitude sweep capability
8 frequency and phase offset profiles
1.8 V and 3.3 V power supplies
Software and hardware controlled power-down
100-lead TQFP_EP package
Integrated 1024 word × 32-bit RAM
PLL REFCLK multiplier
Parallel datapath interface
Internal oscillator, can be driven by a single crystal
Phase modulation capability
Amplitude modulation capability
Multichip synchronization
APPLICATIONS
Agile local oscillator (LO) frequency synthesis
Programmable clock generator
FM chirp source for radar and scanning systems
Test and measurement equipment
Acousto-optic device drivers
Polar modulator
Fast frequency hopping
FUNCTIONAL BLOCK DIAGRAM
14-BIT DAC
1GSPS DDS CORE
LINEAR
RAMP
GENERATOR
1024
ELEMENT
RAM
HIGH SPEED PARALLEL
DATA INTERFACE
TIMING AND CONTROL
SERIAL CONTROL
DATA PORT
REFCLK
MULTIPLIER
0
AD9910
Figure 1.
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參數(shù)描述
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