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參數資料
型號: AD9923A
廠商: Analog Devices, Inc.
英文描述: CCD Signal Processor with V-Driver and Precision Timing⑩ Generator
中文描述: CCD信號處理器與V - Driver和精確定時⑩發生器
文件頁數: 30/88頁
文件大小: 852K
代理商: AD9923A
AD9923A
Generating Line Alternation for V-Sequences and HBLK
During low resolution readout, some CCDs require a different
number of vertical clocks on alternate lines. The AD9923A can
support such CCDs by using different VREP registers. This
allows a different number of VPAT repetitions to be programmed
on odd and even lines.
Rev. 0 | Page 30 of 88
Note that only the number of repeats is different in odd and
even lines, but the VPAT group remains the same. There are
separate controls for the assigned Group A and Group B patterns.
Both Group A and Group B can support odd and even line
alternation. Group A uses the VREPA_1 and VREPA_2 regis-
ters; Group B uses the VREPB_ODD and VREPB_EVEN
registers. Group A can also support three-line and four-line
alternation by using the VREPA_3 and VREPA_4 registers.
Additionally, the HBLK signal can be alternated for odd and
even lines. When the HBLKALT = 1, the HBLKTOGE1 and
HBLKTOGE2 positions are used on odd lines, and the
HBLKTOGE3 to HBLKTOGE6 positions are used on even
lines. This allows the HBLK interval to be adjusted on odd
and even lines if needed.
Figure 41 shows an example of simultaneous VPAT repetition
alternation and HBLK alternation. Both types of alternation can
be used separately.
XV1
XV2
VREPA_1 = 2
(OR VREPB_ODD = 2)
VREPA_2 = 5
(OR VREPB_EVEN = 5)
VREPA_1 = 2
(OR VREPB_ODD = 2)
XV13
HD
NOTES
1. THE NUMBER OF REPEATS FOR V-PATTERN GROUP A OR GROUP B CAN BE ALTERNATED ON ODD AND EVEN LINES.
2. GROUP A ALSO SUPPORTS 3-LINE AND 4-LINE ALTERNATION USING THE ADDITIONAL VREPA_3 AND VREPA_4 REGISTERS.
3. THE HBLK TOGGLE POSITIONS CAN ALSO BE ALTERNATED BETWEEN ODD AND EVEN LINES TO GENERATE DIFFERENT HBLK PATTERNS
FOR ODD/EVEN LINES. SEE THE HORIZONTAL CLAMPING AND BLANKING SECTION FOR MORE INFORMATION ON HBLK.
HBLK
HBLKTOGE1
HBLKTOGE2
HBLKTOGE3
HBLKTOGE4
HBLKTOGE1
HBLKTOGE2
0
Figure 41. Odd/Even Line Alternation of VPAT Repetitions and HBLK Toggle Positions
相關PDF資料
PDF描述
AD9923ABBCZ CCD Signal Processor with V-Driver and Precision Timing⑩ Generator
AD9923ABBCZRL CCD Signal Processor with V-Driver and Precision Timing⑩ Generator
AD9925BBCZRL CCD Signal Processor with Vertical Driver and Precision Timing Generator
AD9925 CCD Signal Processor with Vertical Driver and Precision Timing Generator
AD9925BBCZ CCD Signal Processor with Vertical Driver and Precision Timing Generator
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AD9923BBCZ 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:
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