- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄373970 > AD9923A (Analog Devices, Inc.) CCD Signal Processor with V-Driver and Precision Timing⑩ Generator PDF資料下載
參數(shù)資料
| 型號(hào)： | AD9923A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | CCD Signal Processor with V-Driver and Precision Timing⑩ Generator |
| 中文描述： | CCD信號(hào)處理器與V - Driver和精確定時(shí)⑩發(fā)生器 |
| 文件頁(yè)數(shù)： | 46/88頁(yè) |
| 文件大小： | 852K |
| 代理商： | AD9923A |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)當(dāng)前第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)
AD9923A
Rev. 0 | Page 46 of 88
Table 37. XSUBCNT Multiplexer
Register
XSUBCNT_MUX
Length
(Bits)
5
Range
0 to 31
Description
Selects internal signal to
be used for XSUBCNT
0: XV6
1: XV8
2: XV9
3: XV10
4: VSG5
5: VSG6
6: VSG7
7: VSG8
8: VSG2
9: VSG3
10: VSG4
11: VSG1
12: XV13
13: VSUB
14: MSHUT
15: STROBE
16: XV1
17: XV2
18: XV3
19: XV4
20: XV5
21: XV7
22: XV11
23: XV12
24: SHUT0
25: SHUT1
26: SHUT2
27: SHUT3
28: FG_TRIG
29: invalid setting
30: high
31: low
SUBCK: Normal Operation
By default, the AD9923A operates in a normal SUBCK configu-
ration with the SUBCK signal pulsing in every VD field (see
Figure 64). The SUBCK pulse occurs once per line, and the total
number of repetitions within the field determines the exposure
time. The SUBCK pulse polarity and toggle positions within a
line are programmable, using the SUBCKPOL and SUBCK1TOG
registers (see Table 38). The number of SUBCK pulses per field
is programmed in the SUBCKNUM register (Address 0x64).
As shown in Figure 64, the SUBCK pulses always begin in the
line following the SG active line (specified in the SGACTLINE
registers for each field). The SUBCKPOL, SUBCK1TOG,
SUBCK2TOG, SUBCKNUM, and SUBCKSUPPRESS registers
are updated at the start of the line after the sensor gate line, as
described in the Updating New Register Values section.
SUBCK: High Precision Operation
High precision shuttering is used in the same manner as normal
shuttering, but an additional register is used to control the last
SUBCK pulse. In this mode, the SUBCK pulses once per line,
but the last SUBCK in the field has an additional SUBCK pulse,
whose location is determined by the SUBCK2TOG register, as
shown in Figure 65. Finer resolution of the exposure time is
possible using this mode. Leaving the SUBCK2TOG register set
to its maximum value (0xFFFFFF) disables the last SUBCK
pulse (default setting).
SUBCK: Low Speed Operation
Normal and high precision shutter operations are used when
the exposure time is less than one field long. For exposure times
longer than one field interval, low speed shutter operation is
used. The AD9923A uses a separate exposure counter to
achieve long exposure times. The number of fields for the low
speed shutter operation is specified in the EXPOSURENUM
register (Address 0x63). As shown in Figure 66, this shutter
mode suppresses the SUBCK and VSG outputs from 0 fields up
to 4095 fields (VD periods). The VD and HD outputs can be
suppressed during the exposure period by programming the
VDHDOFF register to 1.
To generate a low speed shutter operation, trigger a long ex-
posure by writing to the TRIGGER register, Bit D3. When this
bit is set high, the AD9923A begins an exposure operation at
the next VD edge. If a value greater than 0 is specified in the
EXPOSURENUM register, the AD9923A suppresses the
SUBCK output on subsequent fields.
If the exposure is generated using the TRIGGER register and
the EXPOSURENUM register is set to 0, the behavior of the
SUBCK is the same as during normal shutter or high precision
shutter operations, in which the TRIGGER register is not used.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9923ABBCZ | CCD Signal Processor with V-Driver and Precision Timing⑩ Generator |
| AD9923ABBCZRL | CCD Signal Processor with V-Driver and Precision Timing⑩ Generator |
| AD9925BBCZRL | CCD Signal Processor with Vertical Driver and Precision Timing Generator |
| AD9925 | CCD Signal Processor with Vertical Driver and Precision Timing Generator |
| AD9925BBCZ | CCD Signal Processor with Vertical Driver and Precision Timing Generator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9923ABBCZ | 功能描述:IC PROCESSOR CCD 12BIT 105CSPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類(lèi)型:觸控式傳感器 輸入類(lèi)型:數(shù)字 輸出類(lèi)型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類(lèi)型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件 |
| AD9923ABBCZRL | 功能描述:IC PROCESSOR CCD 12BIT 105CSPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類(lèi)型:觸控式傳感器 輸入類(lèi)型:數(shù)字 輸出類(lèi)型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類(lèi)型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件 |
| AD9923BBCZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD9923BBCZRL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9924BBCZ | 制造商:Analog Devices 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。