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參數(shù)資料
型號(hào): AD9923ABBCZRL
廠商: ANALOG DEVICES INC
元件分類: 消費(fèi)家電
英文描述: CCD Signal Processor with V-Driver and Precision Timing⑩ Generator
中文描述: SPECIALTY CONSUMER CIRCUIT, PBGA105
封裝: 8 X 8 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-225, CSPBGA-105
文件頁(yè)數(shù): 32/88頁(yè)
文件大小: 852K
代理商: AD9923ABBCZRL
AD9923A
Hold Area Using FREEZE/RESUME Registers
The FREEZE/RESUME registers can also be used to create a
hold area, in which the XV outputs are temporarily held and
then later resume at the point where they were held. As shown
in Figure 44, this is different than using the VMASK register,
Rev. 0 | Page 32 of 88
because the XV outputs continue from where they stopped (as
opposed to having the pixel counter run continuously), with
any toggle positions that fall between the FREEZE and
RESUME locations being ignored. Signals assigned to Group B
are not affected by the hold area.
XV1
XV11
HD
NOTES
1. WHEN HOLD = 1 FOR ANY V-SEQUENCE, THE FREEZE AND RESUME REGISTERS ARE USED TO SPECIFY THE HOLD AREA FOR GROUP A.
2. ABOVE EXAMPLE: ALL XV-OUTPUTS ARE ASSIGNED TO GROUP A.
3. H-COUNTER FOR GROUP A (XV1 TO XV13) STOPS DURING HOLD AREA.
XV12
HOLD AREA
FOR GROUP A
XV13
FREEZE
RESUME
0
Figure 44. Hold Area for Group A
XV1
XV11
HD
NOTES
1. ABOVE EXAMPLES: XV12 AND XV13 ARE ASSIGNED TO GROUP B.
2. GROUP B DOES NOT USE HOLD AREA.
XV12
HOLD AREA
FOR GROUP A
XV13
NO HOLD
AREA FOR
GROUP B
FREEZE
RESUME
0
Figure 45. Group B Does Not Use Hold Area
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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