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參數資料
| 型號： | AD9923ABBCZRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | CCD Signal Processor with V-Driver and Precision Timing⑩ Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA105 |
| 封裝： | 8 X 8 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-225, CSPBGA-105 |
| 文件頁數： | 62/88頁 |
| 文件大小： | 852K |
| 代理商： | AD9923ABBCZRL |
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AD9923A
Rev. 0 | Page 62 of 88
Table 43. Standby Mode Operation—Vertical and Shutter Outputs
Output
Standby 3 (Default)
1
,
2
XV1
Low
XV2
Low
XV3
Low
XV4
Low
XV5
Low
XV6
Low
XV7
Low
XV8
Low
XV9
Low
XV10
Low
XV11
Low
XV12
Low
XV13
Low
VSG1
Low
VSG2
Low
VSG3
Low
VSG4
Low
VSG5
Low
VSG6
Low
VSG7
Low
VSG8
Low
XSUBCK
Low
VSUB
5
Low
MSHUT
5
Low
STROBE
5
Low
1
Polarities for vertical and shutter outputs when the AD9923 is in Standby 3 mode are programmable using the STANDBY3POL register, Address 0xE2 (default register
value = 0x000000).
2
Bit assignments for the STANDBY3POL[23:0] register (Address 0xE2): (MSB) STROBE, MSHUT, VSUB, XSUBCK, VSG8, VSG7, VSG6, VSG3, VSG5, VSG4, VSG2, VSG1, XV13,
XV12, XV11, XV10, XV9, XV8, XV7, XV6, XV5, XV4, XV3, XV2, and XV1 (LSB).
3
Polarities for vertical outputs when the AD9923 is in Standby 1, Standby 2, or if OUTCONTROL = low, are programmable using the STANDBY12POL register,
Address 0xF3 (default register value = 0x3FE000)
4
Bit assignments for the STANDBY12POL[20:0] register (Address 0xF3): (MSB) XSUBCK, VSG8, VSG7, VSG6, VSG3, VSG5, VSG4, VSG2, VSG1, XV13, XV12, XV11, XV10, XV9,
XV8, XV7, XV6, XV5, XV4, XV3, XV2, and XV1 (LSB).
5
VSUB, MSHUT, and STROBE polarities for Standby 1, Standby 2, or if OUTCONTROL = low are controlled by STANDBY3POL.
OUTCONTROL = Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
High
High
High
High
High
High
High
High
Low
Low
Low
Standby 2
3
,
4
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
High
High
High
High
High
High
High
High
Low
Low
Low
Standby 1
3
,
4
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
High
High
High
High
High
High
High
High
Low
Low
Low
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