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參數資料
| 型號： | 1215E |
| 英文描述： | TEST/JTAG SUPPORT|CMOS|QFP|48PIN|PLASTIC |
| 中文描述： | 測試/ JTAG支持|的CMOS | QFP封裝| 48PIN |塑料 |
| 文件頁數： | 3/92頁 |
| 文件大小： | 1041K |
| 代理商： | 1215E |
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Agere Systems Inc.
11
User Manual
April 2001
Advanced Operational Mode
497AE and 1215E Boundary-Scan Master 2
The BSM2 Scan Process
Introduction
Normal Scan Operation
Normal scan operation in the BSM2 involves loading
test input stimulus data into the TVO FIFO and defining
a sequence of states in the TAP Controllers of the
selected/attached B-S chain. This sequence is the
shortest path through the finite state machine imple-
menting the TAP Controller such that it begins at a
defined starting TAP Controller state, passes through a
defined TAP Controller state in which scanning occurs,
may pass through a defined TAP Controller state in
which the operation will "idle" for a defined amount of
time, and terminates in a defined TAP Controller state.
During normal scan operation, test results output data
is stored in the TVI FIFO.
Normal scan operation is selected by setting the
TIOM[2:0] bits of the CUTI register to 001.
Applying Stimulus While Ignoring Test Results
If it is desired to ignore test results during a scan opera-
tion, the BSM2 can be programmed to do so by setting
the TIOM[2:0] bits to 000.
This mode can be used when it is desired to improve
scan downloads to a target device and avoid the over-
head of the extra I/O operations needed for reading
output from TVI. For example, the technique can be
used to download software or to establish programma-
ble logic prior to “burn-in.”
See also the discussion of rapid upload of data under
the heading Recirculation Scan.
Scanning Out Results Without Applying Test
Stimulus
To scan data from a selected/attached B-S chain with-
out scanning new test stimulus into the chain, the
TIOM[2:0] bits should be set to 100. In this “response
only” mode, data from the chain is directed to the TVI
FIFO or the SAR (as determined by current program-
ming of for scan sequence modifier or SSM), but no
data from the TVO FIFO or the ATPG function is
scanned into the chain. Instead, the chain is simply
reloaded with the data it previously contained in the
manner described under the heading Recirculation
Scan.
Defining TAP Controller States in a Scan
Sequence
The starting state is the current state of the TAP Con-
trollers in the attached/selected B-S chain. This state is
synchronized with the state known to the TAP State
Tracker at power-up or by the use of TSRT* to force
the attached/selected B-S chain TAP controllers to the
Test-Logic-Reset TAP Controller state. Once synchro-
nization is established, the current state of the TAP
controllers of the attached/selected B-S chain can be
determined by the value of the TAPS[3:0] bits in the
STAT register.
The TAP Controller state in which scanning is to occur
is determined by the value of the SCT[2:0] bits in the
CSC register.
The destination TAP Controller state is determined by
the value of the DET[1:0] bits in the CSC register.
The “Idle” TAP Controller state is determined by the
Idle Type bits (IDT[1:0]) in the CSC register. Note that if
an "idle" TAP Controller state is specified that does not
lie on the shortest path between the starting state and
the destination state running through the scanning
state, then that "idle" state will never be entered in the
scan operation.
The number of cycles of the TCK signal for which the
operation is to remain in the "idle" TAP Controller state
is written to the IDLE register.
Writing, Reading, and Operation of the Input
and Output Scan Data FIFOs (TVI and TVO)
Pseudocode illustrating a normal scan process is illus-
trated on page 28.
The total number of bits to be scanned in a single vec-
tor is written to the TVX register.
The starting address for test stimulus data in the TVO
FIFO is written to the APO register. The starting
address for test results data in the TVI FIFO is written
to the API register.
Establishing the type of scan operation is done by writ-
ing the TIOM[2:0] bits of the CUTI register. Execution is
initiated by writing the EXEC bit of the CUTI register.
The status register allows the controlling processor to
monitor the scan operation. For example, if all test
result data in the TVI FIFO has been read, this will be
indicated by the TVIM bit. If the TVO FIFO has not
been filled with stimulus data, this will be indicated by
the TVOU bit.
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