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| 型號(hào)： | 1215E |
| 英文描述： | TEST/JTAG SUPPORT|CMOS|QFP|48PIN|PLASTIC |
| 中文描述： | 測(cè)試/ JTAG支持|的CMOS | QFP封裝| 48PIN |塑料 |
| 文件頁(yè)數(shù)： | 45/92頁(yè) |
| 文件大小： | 1041K |
| 代理商： | 1215E |
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Agere Systems Inc.
5
User Manual
April 2001
Advanced Operational Mode
497AE and 1215E Boundary-Scan Master 2
Introduction
Conventions
Throughout this document, an asterisk on any pin
name indicates active-low.
The test and diagnostic processor interfaced to a BSM2
is simply called the controlling processor or the “roces-
sor.
The BSM2
The Agere 497AE/1215E Boundary-Scan Master 2
(BSM2) communicates with a generic processor in
parallel and controls the test and diagnosis (T&D) of a
unit-under-test (UUT)—a device, board, or system,
based on the ANSI/IEEE1 Std 1149.1-1990 Test
Access Port (TAP) and Boundary-Scan (B-S) Architec-
ture and its supplements. The BSM2 serializes test
vectors, delivers them to the UUT using the standard
protocol, and stores UUT response as raw data or as a
signature. An automatic test pattern generator (ATPG)
generates four common test sequences for intercon-
nect test, cluster test, etc. The BSM2 also solves
potential problems of bus conflict and nonrepeatable
board-level signatures associated with pseudorandom
testing of a product through its B-S architecture. Finally,
the BSM2 provides support for edge-connector/back-
plane test and system test and diagnosis.
The 497AE and 1215E represent a total redesign of the
5 V 497AA using 0.35 m CMOS technology. The
major differences are that both parts have a higher
operating frequency: 65 MHz, only require a 3.3 V
power supply, and can operate over the temperature
range of –40 °C to +85 °C. The new 497AE design
maintains a high degree of hardware and software
compatibility with the 497AA (manual MN98-
030NTNB). New features and operational modes have
been added to the 497AE and 1215E. The present
manual describes operation of these parts in advanced
operation mode:
1. Synchronous/asynchronous-8 mode (497AE)—the
interface of the 497AE can operate either synchro-
nously or asynchronously according to user selec-
tion. In addition, one of two internal operational
modes is selectable—either the 497AA Compatibility
Mode or the Advanced Operational Mode.
The Advanced Operational Mode is significantly dif-
ferent than the 497AA mode. There is an internal
state machine that tracks the state of the TAP Con-
trollers of the B-S devices currently in the UUT B-S
chain connected to (addressed by) the BSM2. With
this feature, TMS signal generation is greatly simpli-
fied, i.e., automatic. Access to the data memories is
also simplified because they behave like FIFOs.
2. Asynchronous-16 interface (1215E)—this is similar
to the 8-bit mode Advanced Operational Mode
described above, but with a different package (48-pin
TQFP) and a 16-bit data bus.
Although the 497AE supports 4 possible operational
scenarios (2 different host interfaces, 2 different inter-
nal operational modes), the 1215E operates only with
an asynchronous host interface and in Advanced
Operational Mode. The Advanced Operational Modes
are described in this document.
A systems approach was taken in defining the archi-
tecture of the BSM2. A major goal of the architecture
was to minimize the housekeeping required by the pro-
cessor, as well as to maximize the T&D throughput.
Figure 1 depicts the architecture of the BSM2.
At the left of the figure is shown a generic microproces-
sor interface with address, data, and control signal
connections. On the right side are shown the signals
by which the BSM2 communicates with an ANSI/
IEEE
Std 1149.1-1990 TAP. Consequently, the BSM2 can be
considered a protocol converter. The main subsystems
of this device are listed below and will be discussed in
more detail in the following sections:
Processor Interface (PI)
s
Device Controller
s
BSM2 internal registers (see Appendix B)
s
Test Data Memories (FIFOs)
s
Automatic Test Pattern Generation (ATPG), Scan
Sequence Modification, and Signature Analysis
s
Automatic TMS Generator
s
TAP State Tracker
s
TCK Generator and Gating
s
User-Definable I/O (1215E Only)
s
*
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