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參數資料
型號: MC68CK338
廠商: Motorola, Inc.
元件分類: 32位微控制器
英文描述: Highly Integrated, Low-Power, 32-Bit Microcontroller
中文描述: 高度集成,低功耗,32位微控制器
文件頁數: 42/133頁
文件大?。?/td> 798K
代理商: MC68CK338
MOTOROLA
42
MC68CK338
MC68CK338TS/D
Data lines have weak internal pull-up drivers. External bus loading can overcome the weak internal pull-
up drivers on data bus lines, and hold pins low during reset. Use an active device to hold data bus lines
low. Data bus configuration logic must release the bus before the first bus cycle after reset to prevent
conflict with external memory devices. The first bus cycle occurs ten CLKOUT cycles after RESET is
released. If external mode selection logic causes a conflict of this type, an isolation resistor on the driven
lines may be required.
3.8.2 Reset States of SIML Pins
Generally, while RESET is asserted, SIML pins either go to an inactive high-impedance state or are
driven to their inactive states. After RESET is released, mode selection occurs and reset exception pro-
cessing begins. Pins configured as inputs must be driven to the desired active state. Pull-up or pull-
down circuitry may be necessary. Pins configured as outputs begin to function after RESET is released.
Table 32
is a summary of SIML pin states during reset.
Table 31 Reset Mode Selection
Mode Select Pin
Default Function
(Pin Left High)
CSBOOT 16-Bit
CS0
CS1
CS2
CS3
CS4
CS5
CS6
CS[7:6]
CS[8:6]
CS[9:6]
CS[10:6]
DSACK[1:0]
AVEC, DS, AS
SIZ[1:0]
IRQ[7:1]
MODCLK
Test Mode Disabled
VCO = System Clock
Background Mode Disabled
Alternate Function
(Pin Pulled Low)
CSBOOT 8-Bit
BR
BG
BGACK
FC0
FC1
FC2
ADDR19
ADDR[20:19]
ADDR[21:19]
ADDR[22:19]
ADDR[23:19]
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
PORTE
DATA9
PORTF
DATA11
MODCLK
BKPT
Test Mode Enabled
EXTAL = System Clock
Background Mode Enabled
相關PDF資料
PDF描述
MC68EC060 32-Bit Microprocessors.(32位微處理器)
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相關代理商/技術參數
參數描述
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