- 您現在的位置：買賣IC網 > PDF目錄382347 > MR82510 (Intel Corp.) ASYNCHRONOUS SERIAL CONTROLLER PDF資料下載
參數資料
| 型號： | MR82510 |
| 廠商： | Intel Corp. |
| 英文描述： | ASYNCHRONOUS SERIAL CONTROLLER |
| 中文描述： | 異步串行控制器 |
| 文件頁數： | 16/40頁 |
| 文件大小： | 463K |
| 代理商： | MR82510 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
M82510
BANK THREEDMODEM CONFIGURATION
(Continued)
Register
7
6
5
4
3
2
1
0
Address Default
GIR/BANK
(21)
0
BANK
Pointer
bit 1
BANK
Pointer
bit 0
0
Active
Block Int
bit 2
Active
Block Int
bit 1
Active
Block Int
bit 0
Interrupt
Pending
2
01H
BBCF (10)
BRGB Clock Source
0
0
0
BRGB
Mode
0
0
3
84H
PMD (15)
DCD/ICLK/ DCD/ICLK/ DSR/TA/ DSR/TA/ RI/SCLK
OUT 1
OUT 1
OUT 0
Direction
Function
Direction Function
DTR/TB
Function
0
0
4
FCH
OUT 0
Function
MIE (19)
0
0
0
0
DCD State RI State
Change Int Change Int Change Int Change Int
Enable
Enable
DSR State CTS State
5
0FH
Enable
Enable
TMIE (18)
0
0
0
0
0
0
Timer B
Interrupt
Enable
Timer A
Interrupt
Enable
6
00H
CONFIGURATION
These read/write registers are used to configure the device. They may be read at anytime; however, they may
be written to only when the device is idle. Typically they are written to only once after system power up. They
are set to default values upon Hardware or Software Reset (Default Wake-Up Mode). The default values are
chosen so as to allow the M82510 to be fully software compatible with the IBM PC Async Adapter
(INS 8250A/16450) when in the default wakeup mode. The M82510 can operate in the High Performance
mode by programming the configuration registers as necessary.
The configuration options available to the user are listed below.
Table 11. Configuration Options
Interrupt Acknowledge Mode
#
Automatic
#
Manual
Receive
#
Sampling Window Size
#
Start Bit Detection Mode
#
DPLL Disable/Enable
m
LAN (8051)
Address Recognition
#
Manual, Semi-Automatic,
Automatic
Diagnostics
#
Loopback
#
Remote
#
Local
#
Echo
#
Yes/No
#
Disable Error Echo
#
Disable Control/Address
Char. Echo
FIFO
#
#
Clock Options
#
RX, TX Clock Mode
#
1X
#
16X
#
RX, TX Clock Source
#
BRGA
#
BRGB
#
BRGA/B Operation Mode
#
Timer
#
BRG
#
BRGA/B Divide Count
#
BRGA/B Source
#
Sys Clock
#
SCLK Pin
#
BRGA Output (BRGB
Only)
RX FIFO Depth
RX, TX Threshold
Control Character
Recognition
#
None
#
Standard
#
ASCII
#
EBCDIC
#
Two User Programmed
TX Operation
#
RTS/CTS Control
Manual, Semi-Automatic,
Automatic
#
Parity Mode
#
Stop Bit Length
#
Character Size
I/O Pins
#
Select Function for Each
Multifunction Pin
#
Select Direction for Multi-
function Pin (If Applica-
ble)
16
相關PDF資料 |
PDF描述 |
|---|---|
| MR8251A | PROGRAMMABLE COMMUNICATION INTERFACE |
| MR851G | Axial Lead Fast Recovery Rectifiers |
| MR851RL | Axial Lead Fast Recovery Rectifiers |
| MR851RLG | Axial Lead Fast Recovery Rectifiers |
| MR852G | Axial Lead Fast Recovery Rectifiers |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MR82510/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8251A | 制造商:Intel 功能描述: |
| MR8251A/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8254/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8254/R | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發布緊急采購，3分鐘左右您將得到回復。