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參數(shù)資料
| 型號： | MR82510 |
| 廠商： | Intel Corp. |
| 英文描述： | ASYNCHRONOUS SERIAL CONTROLLER |
| 中文描述： | 異步串行控制器 |
| 文件頁數(shù)： | 35/40頁 |
| 文件大小： | 463K |
| 代理商： | MR82510 |
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M82510
34. TXFDTRANSMIT FLAGS REGISTER
TxFDTransmit Flags Register
271072–47
This register holds some additional components of
the next character to be pushed into the Tx FIFO.
The contents of this register are pushed into the Tx
FIFO with the Transmit Data register whenever the
TxD register is written to by the CPU.
uLANDuLAN Address Marker BitD
This bit is
transmitted in uLAN mode as the address marker
bit.
SPDSoftware Parity BitD
This bit is transmitted in
S/W parity mode as the character’s parity bit.
D8DNinth Bit of DataD
In nine-bit character length
mode this bit is transmitted as the MSB (D8) bit.
35. RXDDRECEIVE DATA REGISTER
RXDDReceive Data Register
271072–48
This register holds the earliest received character in
the Rx FIFO. The character is right justified and
leading bits are zeroed. This register is loaded by the
Rx Machine with the first received character. Read-
ing the register causes the next register from the Rx
FIFO to be loaded into RxD and RxF registers.
35
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MR8251A | PROGRAMMABLE COMMUNICATION INTERFACE |
| MR851G | Axial Lead Fast Recovery Rectifiers |
| MR851RL | Axial Lead Fast Recovery Rectifiers |
| MR851RLG | Axial Lead Fast Recovery Rectifiers |
| MR852G | Axial Lead Fast Recovery Rectifiers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MR82510/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8251A | 制造商:Intel 功能描述: |
| MR8251A/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8254/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8254/R | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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