
M82510
14. BBHDBRGB DIVIDE COUNT MOST SIGNIFICANT BYTE
BBHDBRGB Divide Count High Byte
271072–27
This register contains the most significant byte of the BRGB divisor/count.
15. PMDDI/O PIN MODE REGISTER
PMDDI/O Pin Mode Register
271072–28
This register is used to configure the direction and
function of the multifunction pins. The following op-
tions are available on each pin.
1. Direction: Input or Output Pin.
0D Defines the Pin as an output pin (general pur-
pose or special function).
1D Defines the pin as an input pin.
2. Function: General purpose or special purpose pin
(no effect if the pin is programmed as an Input).
0D special function output pin.
1D general purpose output pin.
DIODDDCD/ICLK/OUT1 Direction.
0D Output: ICLK or OUT1 (depending on bit
DIOF)
1D Input: DCD.
DIOFDDCD/ICLK/OUT1
mode only).
Function
(output
0D ICLK (Output of the Internal System Clock).
1D OUT1 general purpose output, Controlled by
MODEM CONTROL Register
DTADDDSR/TA/OUT0 Direction.
0D Output:
DTAF).
1D Input: DSR.
DTAFDDSR/TA/OUT0
mode only).
TA
or
OUT0
(Dependent
upon
Direction
(output
0D TA (BRGA Output or Timer A Termination
Pulse).
1D OUT0 (general purpose output, controlled by
MODEM CONTROL).
RRFDRI/SCLK Function
0D SCLK (Receive and/or Transmit Clock)
1D RI
DTFDDTR/TB Function
0D TB (BRGB Output Clock on Timer B termina-
tion pulse depending upon the mode of
BRGB).
1D DTR
24