
M82510
32. MCRDMODEM CONTROL REGISTER
MCRDModem Control Register
271072–45
This register controls the modem output pins. With
multi-function pins it affects only the pins configured
as general purpose output pins. All the output pins
invert the data, i.e. their output will be the comple-
ment of the data written into this register.
OUT0DOUT0 Output BitD
This bit controls the
OUT0 pin. The output signal is the complement of
this bit.
LCB Loopback Control BitD
This bit puts the
M82510 into loopback mode. The particular type of
loopback is selected via the IMD register.
OUT2DOUT2 Output BitD
This bit controls the
OUT2 pin. The output signal is the complement of
this bit.
OUT1DOUT1 Output BitD
This bit controls the
OUT1 pin. The output signal is the complement of
this bit.
RTSDRTS Output BitD
This bit controls the RTS
pin. The output signal is the complement of this bit.
DTRDDTR Output BitD
This bit controls the DTR
pin. The output signal is the complement of this bit.
DATA REGISTERS
The data registers hold data or other information
and may be accessed at any time.
33. TXDDTRANSMIT DATA REGISTER
TXDDTransmit Data Register
271072–46
This register holds the next data byte to be pushed
into the Transmit FIFO. For character formats with
more than eight bits of data, or with additional com-
ponents (S/W Parity, Address Marker Bit) the addi-
tional data bits should be written into the TxF regis-
ter. When a byte is written to this register its con-
tents, along with the contents of the TxF register,
are pushed to the top of the Transmit FIFO. This
register is write only.
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