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參數(shù)資料
| 型號： | MR82510 |
| 廠商： | Intel Corp. |
| 英文描述： | ASYNCHRONOUS SERIAL CONTROLLER |
| 中文描述： | 異步串行控制器 |
| 文件頁數(shù)： | 21/40頁 |
| 文件大小： | 463K |
| 代理商： | MR82510 |
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M82510
7. RMDDRECEIVE MACHINE MODE REGISTER
RMDDReceive Machine Mode Register
271072–20
This register defines the Rx Machine mode of opera-
tion.
uCM0, uCM1DuLAN/Control Character Recogni-
tion ModeD
In normal mode it defines the Control
Character recognition mode. In ulan mode they de-
fine modes of address recognition.
In uLAN mode: selects the mode of address recog-
nition.
00DManual ModeD
Rx Machine reports reception
of any address character, via CRF bit of RECEIVE
STATUS register, and writes it to the Rx FIFO.
01DSemi-Automatic ModeD
Operates the same
as Manual Mode but, in addition, the Rx Machine
OPENS (unlocks) the Rx FIFO upon reception of any
address characters. Subsequent received charac-
ters will be written into the FIFO. (Note: it is the us-
er’s responsibility to LOCK the FIFO if the address
character does not match the station’s address.)
10DAutomatic ModeD
The Rx Machine will OPEN
(unlock) the Rx FIFO upon Address Match. In addi-
tion the Rx Machine LOCKs the Rx FIFO upon rec-
ognition of address mismatch; i.e., it controls the
flow of characters into the Rx FIFO depending upon
the results of the address comparison. If a match
occurs it will allow characters to be sent to the FIFO;
if a mismatch occurs it will keep the characters out
of the FIFO by LOCKING it.
11DReserved
In normal Mode: selects the mode of Standard Set
Control Character Recognition (programmed control
characters are always recognized).
00D No Standard Set Control Characters Recog-
nized.
01D ASCII Control Characters
(00HD1 FH
a
7FH).
10D Reserved.
11D EBCDIC Control Character Recognized
(00H
b
3FH).
DPDDDisable Digital Phase Locked LoopD
When
set, disables the DPLL machine. (Note: using the
DPLL in a very noisy media, may increase the error
rate.)
SWMDSampling Window ModeD
This bit controls
the mode of data sampling:
0DSmall Window, 3/16 sampling.
1DLarge Window, 7/16 sampling.
SSMDStart Bit Sampling ModeD
This bit controls
the mode of Start Bit sampling.
0D Majority Voting for start bit. In this mode a ma-
jority of the samples determines the bit.
1D In this mode if one of the bit samples is not
‘0’, the start bit will not be detected.
21
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MR8251A | PROGRAMMABLE COMMUNICATION INTERFACE |
| MR851G | Axial Lead Fast Recovery Rectifiers |
| MR851RL | Axial Lead Fast Recovery Rectifiers |
| MR851RLG | Axial Lead Fast Recovery Rectifiers |
| MR852G | Axial Lead Fast Recovery Rectifiers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MR82510/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8251A | 制造商:Intel 功能描述: |
| MR8251A/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8254/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8254/R | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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