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參數資料
| 型號： | MR82510 |
| 廠商： | Intel Corp. |
| 英文描述： | ASYNCHRONOUS SERIAL CONTROLLER |
| 中文描述： | 異步串行控制器 |
| 文件頁數： | 9/40頁 |
| 文件大小： | 463K |
| 代理商： | MR82510 |
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M82510
RX FIFO
271072–9
Figure 9. Rx FIFO
The Rx FIFO is very similar in structure and basic
operation to the Tx FIFO. It will generate a maskable
interrupt when the FIFO level is above, the thresh-
old. The Rx FIFO can also be configured to operate
as a one-byte buffer. This mode is used for 8250
compatible software drivers. An overrun will occur
when the FIFO is full and the Rx Machine has a new
character for the FIFO. In this situation the oldest
character is discarded and the new character is
loaded from the Rx Machine. An Overrun error bit
will also be set in the RECEIVE STATUS and LINE
STATUS registers.
The user has the option to disable the loading of
incoming characters on to the Rx FIFO by using the
UNLOCK/LOCK FIFO commands. (See RECEIVE
COMMAND register.) When the Rx FIFO is locked, it
will ignore load requests from the Rx Machine, and
thus the received characters will not be loaded into
the FIFO and may be lost (if another character is
received). These two commands are useful when
the CPU is not willing to receive characters, or is
waiting for specific Control/Address characters. In
uLAN mode there are three options of address rec-
ognition, each of these options varies in the amount
of CPU offload, and degree of FIFO control through
OPEN/LOCK FIFO commands.
Automatic ModeD
In this mode the Rx Machine will
open the FIFO whenever an Address Match occurs;
it will LOCK the FIFO if an address mismatch occurs.
Semi-Automatic ModeD
In this mode the Rx Ma-
chine will open the FIFO whenever an address char-
acter is received. It will not lock the FIFO if the Ad-
dress does not match. The user is responsible for
locking the Rx FIFO.
Manual ModeD
In this mode the Rx Machine does
not control the FIFO automatically; however, the
user may UNLOCK/LOCK the FIFO by using the
RECEIVE COMMAND register.
RX MACHINE
The RX Machine has two modes of clocking the in-
coming dataD16X or 1X. In 16X synchronization is
done internally; in the 1X mode the data must be
synchronous to the SCLK pin input. The Rx Machine
synchronizes the data, passes it through a digital fil-
ter to filter out the spikes, and then uses the voting
counter to generate the data bit (multiple sampling
of input RXD). Bit polarity decisions are made on the
basis of majority voting; i.e., if the majority of the
samples are ‘‘1’’ the result is a ‘‘1’’ bit. If all samples
are not in agreement then the bit is also reported as
a noisy bit in the RECEIVE FLAGS register. The
sampling window is programmable for either 3/16 or
7/16 samples. The 3/16 mode is useful for high fre-
quency transmissions, or when serious RC delays
are expected on the channel. The 7/16 is best suit-
ed for noisy media. The Rx machine also has a
DPLL to overcome frequency shift problems; howev-
er, using it in a very noisy environment may increase
the error, so the user can disable the DPLL via the
Receive Mode register. The Rx Machine will gener-
ate the parity and the address marker as well as any
framing error indications.
Start Bit DetectionD
The falling edge of the Start
bit resets the DPLL counter and the Rx Machine
starts sampling the input line (the number of sam-
ples is determined by the configuration of the sam-
pling window mode). The Start bit verification can be
done through either a majority voting system or an
absolute voting system. The absolute voting requires
that all the samples be in agreement. If one of the
samples does not agree then a false Start bit is de-
termined and the Rx Machine returns to the Start Bit
search Mode. Once a Start bit is detected the Rx
Machine will use the majority voting sampling win-
dow to receive the data bits.
Break DetectionD
If the input is low for the entire
character frame including the stop Bit, then the Rx
Machine will set Break Detected as well as Framing
Error in the RECEIVE STATUS and LINE STATUS
registers. It will push a NULL character onto the Rx
FIFO with a framing-error and Break flag (As part of
the Receive Flags). The Rx Machine then enters the
Idle state. When it sees a mark it will set Break Ter-
minated in RECEIVE STATUS and LINE STATUS
registers and resume normal operation.
9
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MR82510/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8251A | 制造商:Intel 功能描述: |
| MR8251A/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8254/B | 制造商:Rochester Electronics LLC 功能描述: |
| MR8254/R | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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