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參數資料
型號: P90CL301BFH
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Low voltage 16-bit microcontroller
中文描述: 16-BIT, 27.02 MHz, MICROCONTROLLER, PQFP80
文件頁數: 33/92頁
文件大小: 526K
代理商: P90CL301BFH
1996 Dec 11
33
Philips Semiconductors
Preliminary specification
Low voltage 16-bit microcontroller
P90CL301BFH (C100)
11 TIMERS
11.1
Timer array
Two identical 16-bit timer blocks are provided:
Timer 0 (T0)
Timer 1 (T1).
Each timer block consists of:
A timebase
Three capture/compare channels
A Control Register
A Status Register.
11.2
Timebase
The timebase contains an 8-bit prescaler with a write only
reload register, and a 16-bit counter register. This counter
register can only be read by software. The prescaler is
clocked either by the peripheral clock FCLK or by an
external clock enabled by the flag C/TN in the timer control
register TnCR (T0CT for timer T0 and T1CR for timer T1).
On prescaler overflow the prescaler reload value is loaded
into the prescaler, which starts incrementing.
The 16-bit counter register is incremented at each
prescaler overflow. When the counter reaches FFFFH, the
status flag TOV is set and on the next clock the counter
reload value is loaded into the counter. By resetting the
control bit RUN in the timer control register the timebase is
stopped, and by setting this bit, the prescaler and counter
are reloaded and incremented on the next external or
internal clock.
11.3
Channel function
Each channel consists of a register and an equality
comparator. For each of the three channels two modes
can be selected:
Compare mode:
sets the status flag CFn in TnSR when
there is a match between the counter register and the
channel register value.
Capture mode:
stores the counter register value into
the channel register and sets the status flag CFn when
a transition occurs at the corresponding input pin CPn.
In both modes, each channel can generate a global
interrupt request if the corresponding enable bit in the
Control Register TnCR is set.
11.4
Pin parallel functions for the timer
In order to use the multiplexed pins for the timer, the other functions using these pins as output pins should be forced
HIGH via a weak pull-up, enabling an external source to drive them LOW.
Table 40
Parallel functions
PIN
SETTING
PARALLEL
FUNCTION
SP1/TX1/INT1
SP2/RX0/INT2 if SPCON.2 = 0, SPR.2 = 1; else UART0 should not be used
SP3/TX0/INT3
if SPCON.3 = 0, SPR.3 = 1; else UART0 should not be used
SP4/INT4
if SPCON.4 = 0, SPR.4 = 1
SP5/INT5
if SPCON.5 = 0, SPR.5 = 1
SP6/INT6
if SPCON.6 = 0, SPR.6 = 1
P8/PWM0
if PCON.0 = 0, PWM0 should output a logic 1 (write 00H to register PWM0)
P9/PWM1
if PCON.1 = 0, PWM1 should output a logic 1 (write 00H to register PWM1)
if SPCON.1 = 0, SPR.1 = 1; else UART1 should not be used
CLK0
CP2
CP3
CP4
CP5
CLK1
CP0
CP1
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