
1996 Dec 11
44
Philips Semiconductors
Preliminary specification
Low voltage 16-bit microcontroller
P90CL301BFH (C100)
Note
1.
State after peripheral reset.
12.3.3
UART Q
UEUE
R
EGISTERS
Table 59
UART Queue Registers
2
TIE
Transmission interrupt enable
. If it is set, each time a byte is transmitted the transmit
interrupt flag TIF is set. If it is not set, an interrupt is only generated at the end of the
frame. TIE = 0
(1)
means no interrupt after the reception of each byte. TIE = 1 means
interrupt after the reception of each byte.
Halt transmission
. This bit is set by the CPU to interrupt the transmission of the frame.
The byte currently loaded in the UART will be transmitted entirely, but the next byte will
wait until the CPU reset the bit HLTT. THLT = 0
(1)
means transmission not halted.
THLT = 1 means transmission halted.
Start transmission
. This bit is set by the CPU to start the transmission of a frame through
the UART and it is reset automatically by the queue controller at the end of transmission.
TSTF = 0
(1)
means transmission not started or ended. TSTF = 1 means transmission
started and in progress.
1
THLT
0
TSTF
REGISTER
ADDRESS
7
6
5
4
3
2
1
0
UQTA
UQTS
UQRA
UQRS
UQRM
FFFF 8B03H
FFFF 8B05H
FFFF 8B07H
FFFF 8B09H
FFFF 8B0BH
A7
S7
A7
S7
M7
A6
S6
A6
S6
M6
A5
S5
A5
S5
M5
A4
S4
A4
S4
M4
A3
S3
A3
S3
M3
A2
S2
A2
S2
M2
A1
S1
A1
S1
M1
A0
S0
A0
S0
M0
BIT
SYMBOL
DESCRIPTION