
1996 Dec 11
77
Philips Semiconductors
Preliminary specification
Low voltage 16-bit microcontroller
P90CL301BFH (C100)
EXT
JMP
JSR
LEA
LINK
LSL, LSR
MOVE
Sign Extend
Jump
Jump to Subroutine
Load Effective Address
Link and Allocate
Logical Shift
Move Data from Source to
Destination
Move to Condition Code
Move to the Status
Register
(Destination) Sign
extended
→
Destination
Destination
→
PC
PC
→
SP @
; Destination
→
PC
Destination
→
An
An
→
SP @
; SP
→
An; SP + d
→
SP
(Destination) Shifted by
<
count
> →
Destination
(Source)
→
Destination
*
*
*
*
*
*
*
0
0
0
0
*
0
MOVE to CCR
MOVE to SR
(Source)
→
CCR
(Source)
→
SR
*
*
*
*
*
*
*
*
*
*
MOVE from SR Move from the Status
Register
MOVE USP
Move User Stack Pointer
MOVEA
Move Address
MOVEM
Move Multiple Registers
MOVEP
Move Peripheral Data
MOVEQ
Move Quick
MULS
Signed Multiply
MULU
Unsigned Multiply
NBCD
Negate Decimal with
Extend
NEG
Negate
NEGX
Negate with Extend
NOP
No Operation
NOT
Logical Complement
OR
Inclusive OR Logical
ORI
Inclusive OR Immediate
PEA
Push Effective Address
RESET
Reset External Devices
ROL, ROR
Rotate (Without Extend)
ROXL, ROXR
Rotate with Extend
RTE
Return from Exception
RTR
Return and Restore
Condition Codes
RTS
Return from Subroutine
SBCD
Subtract Decimal with
Extend
S
CC
Set According to Condition if CC then 1
→
Destination; else 0
→
Destination
SR
→
Destination
USP
→
An; An
→
USP
(Source)
→
Destination
Registers
→
Destination; (Source)
→
Registers
(Source)
→
Destination
Immediate Data
→
Destination
(Destination) * (Source)
→
Destination
(Destination) * (Source)
→
Destination
0
(Destination)
10
X
→
Destination
*
*
*
*
U
*
*
*
*
0
*
*
U
0
0
0
*
0
(Destination)
→
Destination
0
(Destination)
X
→
Destination
~(Destination)
→
Destination
(Destination)
∨
(Source)
→
Destination
(Destination)
∨
Immediate Data
→
Destination
Destination
→
SP @
(Destination) Rotated by
<
count
> →
Destination
(Destination) Rotated by
<
count
> →
Destination
SP @ +
→
SR; SP @ +
→
PC
SP @ +
→
CC; SP @ +
→
PC
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
0
0
0
0
0
*
*
*
*
0
0
0
*
*
*
*
SP @ +
→
PC
(Destination)
10
(Source)
10
X
→
Destination
*
U
*
U
*
MNEMONIC
DESCRIPTION
OPERATION
CONDITION
CODES
X
N
Z
V
C