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參數(shù)資料
| 型號： | P90CL301BFH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Low voltage 16-bit microcontroller |
| 中文描述： | 16-BIT, 27.02 MHz, MICROCONTROLLER, PQFP80 |
| 文件頁數(shù)： | 56/92頁 |
| 文件大小： | 526K |
| 代理商： | P90CL301BFH |
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1996 Dec 11
56
Philips Semiconductors
Preliminary specification
Low voltage 16-bit microcontroller
P90CL301BFH (C100)
15 ON-BOARD TEST CONCEPT
To improve the on-board debugging two functions are
implemented, the ON-Circuit Emulation (ONCE) mode and
the on-chip Test-ROM.
15.1
ONCE mode
The ON-Circuit Emulation (ONCE) mode eases the testing
of an application without having to remove the controller
from the board. The ONCE mode is entered by pulling
CSBT LOW during reset. In this mode the address bus,
data bus and bus control signals are in 3-state mode, all
other output or bidirectional pins are weakly pulled HIGH.
In this mode an emulator probe can be hooked-up to the
circuit. Normal operation is restored with a normal reset.
15.2
Test-ROM
A second on-board debugging function is introduced for
the situation where no extra connector can be placed on
the PCB. It consists of an internal Test-ROM of 256 bytes
which is used as boot ROM after a special test mode is
activated during reset. The CPU will execute the code
placed in the Test-ROM and initialize the UART0 and its
baud rate generator and wait for commands to be sent to
UART0.
The internal access time is in this case 3 cycles long. It can
only be accessed in supervisor mode.
The purpose of the Test-ROM is to offer the user a simple
software interface to load programs for testing its own
application and to transmit back the test result.
The program can be loaded from the host into either the
on-chip RAM or the external memory. The Test-ROM
mode is entered by pulling LOW the R/W / TROM pin
during reset.
Just after the RESET initialization, the user should send a
character of 9 bits (one stop bit plus eight data bits) with all
bits being zero, on the RX0 line.
Using the timer, the character length is captured and then
the baud rate is automatically calculated and the baud rate
generator is initialized. The UART0 is then initialized in
Mode 3 with SM2 multiprocessor bit set, REN and TB8 bit
set (SCON = F8H). The hardware is now ready to handle
the protocol using the following 4 commands
(Code 00 to 11).
Table 89
Command format
Table 90
Command description
7
6
5
4
3
2
1
0
Code
NB byte
1
BIT
SYMBOL
DESCRIPTION
7, 6
5 to 0
Code
Pointer commands; see Table 91.
Indicates the length of the transfer; e.g. (NB byte
1) = 0 means a 1 byte transfer,
(NB byte
1) = 63 means a 64 byte transfer.
NB byte
1
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