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參數(shù)資料
型號: P90CL301BFH
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Low voltage 16-bit microcontroller
中文描述: 16-BIT, 27.02 MHz, MICROCONTROLLER, PQFP80
文件頁數(shù): 51/92頁
文件大小: 526K
代理商: P90CL301BFH
1996 Dec 11
51
Philips Semiconductors
Preliminary specification
Low voltage 16-bit microcontroller
P90CL301BFH (C100)
12.5.2
I
2
C-
BUS
D
ATA
S
HIFT
R
EGISTER
(SDAT)
Table 78
I
2
C-bus Data Shift Register (address FFFF 8201H)
Table 79
Description of SDAT bits
12.5.3
I
2
C-
BUS
A
DDRESS
R
EGISTER
(SADR)
This 8-bit register may be loaded with the 7-bit address to which the controller will respond when programmed as a slave
receiver/transmitter.
Table 80
I
2
C-bus Address Register (address FFFF 8203H)
Table 81
Description of SADR bits
7
6
5
4
3
2
1
0
DATA.7
DATA.6
DATA.5
DATA.4
DATA.3
DATA.2
DATA.1
DATA.0
BIT
SYMBOL
DESCRIPTION
7 to 0
DATA.7 to DATA.0
The serial data to be transmitted or data that has just been received.
Bit 7 is transmitted or received first; i.e. data is shifted from right to left.
7
6
5
4
3
2
1
0
SADR.7
SADR.6
SADR.5
SADR.4
SADR.3
SADR.2
SADR.1
SADR.0
BIT
SYMBOL
DESCRIPTION
7 to 1
0
SADR.7 to SADR.1
SADR.0
Slave address.
SADR.0 = GC, is used to determine whether the general CALL address
is recognized. If GC = 0, general CALL address is not recognized (default
value after a CPU reset). If GC = 1, general CALL address is recognized.
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