- 您現在的位置：買賣IC網 > PDF目錄382369 > P90CL301BFH (NXP SEMICONDUCTORS) Low voltage 16-bit microcontroller PDF資料下載
參數資料
| 型號： | P90CL301BFH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Low voltage 16-bit microcontroller |
| 中文描述： | 16-BIT, 27.02 MHz, MICROCONTROLLER, PQFP80 |
| 文件頁數： | 39/92頁 |
| 文件大小： | 526K |
| 代理商： | P90CL301BFH |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁當前第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
1996 Dec 11
39
Philips Semiconductors
Preliminary specification
Low voltage 16-bit microcontroller
P90CL301BFH (C100)
12.1.2
UART C
ONTROL
R
EGISTERS
SCON0
AND
SCON1
The registers SCON0 and SCON1 control UART0 and UART1 modes respectively, and contain the interrupt flags.
Table 49
UART Control Registers SCON0 and SCON1
Table 50
Description of register SCON0 and SCON1 bits
Table 51
Mode defined by bits SM0 and SM1
ADDRESS
REGISTER
7
6
5
4
3
2
1
0
FFFF 8603H
FFFF 8607H
SCON0
SCON1
SM0
SM1
SM2
REN
TB8
RB8
TI
RI
BIT
SYMBOL
DESCRIPTION
7 to 6
5
SM0 to SM1
SM2
Mode bits; see Table 51.
Multiprocessor
; enable the multiprocessor communication feature in Modes 2 and 3.
If SM2 is set the RI will not be activated if the received 9
th
data bit RB8 = 0. In Mode 1,
if SM2 is set the RI will not be activated if a valid stop bit is not received. In Mode 0,
SM2 should be a logic 0.
Receive enable
; enables serial reception; set and cleared by software.
Transmit extra bit
; 9
th
data bit that will be transmitted in Modes 2 and 3; set and
cleared by software.
Receive extra bit
; in Modes 2 and 3, RB8 is the 9
th
bit received. In Mode 1, if SM2 = 0,
RB8 is the stop bit which is received.
Transmit interrupt
; it is set by hardware at the end of the 8
th
bit time in Mode 0, or
halfway through the stop bit in the other modes (except: see bit SM2). TI must be
cleared by software (cannot be set by software). By writing a logic 1 the flags stay
unchanged. In order to clear a particular flag one has to write a logic 0 to the
corresponding position and a logic 1 to the others. One should avoid to use the
instruction BCLR, which can reset accidentally several flags.
Receive interrupt
; set by hardware at the end of the 8
th
bit time in Mode 0, or halfway
through the stop bit in the other modes (except: see SM2). RI must be cleared by
software (cannot be set by software). By writing a logic 1 the flags stay unchanged. In
order to clear a particular flag one has to write a logic 0 to the corresponding position
and a logic 1 to the others. One should avoid to use the instruction BCLR, which can
reset accidentally several flags.
4
3
REN
TB8
2
RB8
1
TI
0
RI
SM0
SM1
MODE
DESCRIPTION
0
0
1
1
0
1
0
1
0
1
2
3
shift register;
1
6
×
CLK
8-bit UART; BGCLK0 and BGCLK1
9-bit UART;
1
16
×
CLK
9-bit UART; BGCLK0 and BGCLK1
相關PDF資料 |
PDF描述 |
|---|---|
| P93U422-35DC | x4 SRAM |
| P93U422-35DM | x4 SRAM |
| P93U422-35DMB | x4 SRAM |
| P93U422-35LC | x4 SRAM |
| P93U422-35LM | x4 SRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| P-90-F | 制造商:Hozan Tool Industrial Co Ltd 功能描述: |
| P90PCT101PC | 制造商:PERFORMANCE/ 功能描述:90PCT101PC |
| P-910 | 制造商:Hozan Tool Industrial Co Ltd 功能描述: |
| P9-100001 | 制造商:OTTO Engineering Inc 功能描述:P9-111122 EX H20 |
| P9-100002 | 制造商:OTTO Engineering Inc 功能描述:P9-111129 EX. |
發布緊急采購，3分鐘左右您將得到回復。